TSMC's CoWoS capacity remains in high demand, securing its dominant position in advanced semiconductor packaging with rumored gross margins nearing 80%. However, TSMC is proceeding cautiously with its advanced packaging expansion due to three major considerations that require careful deliberation.

According to sources within the semiconductor equipment supply chain, as key customers increase their orders, TSMC reviews customer demands and market fluctuations weekly to adjust its advanced packaging capacity and expansion plans accordingly.

• Strategic caution amid market dominance

The three main reasons for this prudence are as follows. First, concerns over rapid capacity expansion potentially leading to oversupply. Second, worries about monopoly issues arising from swift growth. Third, strategic moves by companies like Nvidia aim to control advanced packaging technology while supporting outsourced semiconductor assembly and test (OSAT) providers to diversify risks associated with heavy reliance on TSMC.

Besides continuously upgrading CoWoS to improve performance and cost efficiency, TSMC's System-on-Integrated-Circuits (SoIC) leads as a 3D stacked chip solution. It can be combined with CoWoS and other components to realize wafer-level system-in-package integration.

• Industry collaboration and competition dynamics

Previously, due to supply shortages, some CoWoS orders overflowed to OSATs, focusing mainly on wafer-on-substrate (WoS) stages. Recently, however, they have also incorporated chip-on-wafer (CoW) stages, driven by advances in high-end technology, margin considerations, and customer expectations. This approach also preemptively addresses any external monopoly concerns. For example, in 2024, TSMC signed an agreement with Amkor to collaborate on Integrated Fan-Out (InFO) and CoWoS, which also helps distribute manufacturing pressure in the US.

Notably, the emerging Chip-on-Wafer-on-Platform printed circuit board (CoWoP) represents an evolution of existing CoWoS technology. However, CoWoP is not actively promoted by TSMC but developed jointly by Nvidia and Siliconware Precision Industries Co. (SPIL) to reduce dependence on CoWoS and TSMC itself. While printed circuit board manufacturers support this new opportunity, equipment suppliers remain cautious.

• Market reality versus diversification efforts

Other semiconductor insiders reveal that Nvidia-led CoWoP has yet to show significant progress; advanced packaging still largely depends on TSMC's leadership, making it difficult for chipmakers to intervene effectively.

Supply chain experts point out that despite the AI boom in 2023 driving CoWoS capacity shortages, Samsung Electronics, Intel, and OSAT players have been unable to capture significant market share. The primary reason is TSMC's control over advanced process capacity and technological advantages, offering exclusive end-to-end services that keep orders and customers firmly under its umbrella. Samsung and Intel struggle to secure front-end fabrication orders, let alone advanced packaging contracts.

Meanwhile, OSAT firms face high barriers due to the demanding technology, ongoing research and development needs, talent requirements, and fears of excessive investment costs causing capacity glut. Given the volatile market and potential AI order contractions, OSATs risk being first hit by cancellations, thus hesitating to invest heavily.

Most in the semiconductor supply chain believe that, similar to advanced process nodes, the advanced packaging arena remains a "one-player game," where OSAT participation depends entirely on TSMC's stance.

Overall, the fluctuating AI market conditions can be inferred from TSMC's advanced packaging capacity planning, which continues to lead technological progress.